Hệ điều hành - Chapter 1 and 2: Computer system and operating system overview
The Evolution of Operating Systems
OS Objectives and Functions
Instruction Execution
Interrupts
The Memory Hierarchy
Cache Memory
I/O Communication Techniques
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Chapter 1 and 2Computer System and Operating System OverviewThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesEvolution of Operating SystemsIt may be easier to understand the key requirements of an OS by considering the evolution of Operating SystemsStages includeSerial ProcessingSimple Batch SystemsMultiprogrammed Batch SystemsTime Sharing SystemsSerial Processing(late 1940s to mid-1950s)No operating systemMachines run from a console with display lights, toggle switches, input device, and printerProblems include:Scheduling using a hardcopy sign-up sheetSetup timeloading complier and source program into memorysaving the object programloading and linking object program and common functionsSimple Batch System(mid-1950s)Early computers were extremely expensiveImportant to maximize processor utilizationMonitorSoftware that controls the sequence of eventsBatch jobs togetherProgram returns control to monitor when finishedMonitor’s perspectiveMonitor controls the sequence of eventsResident Monitor is software always in memoryMonitor reads in job and gives controlJob returns control to monitorMultiprogrammed Batch SystemsCPU is often idle Even with automatic job sequencing.I/O devices are slow compared to processorUniprogrammingProcessor must wait for I/O instruction to complete before precedingMultiprogrammingWhen one job needs to wait for I/O, the processor can switch to the other jobMultiprogrammingTime Sharing Systems(early 1960s)Using multiprogramming to handle multiple interactive jobsProcessor’s time is shared among multiple usersMultiple users simultaneously access the system through terminalsBatch Multiprogramming vs. Time SharingEarly Example: CTSSCompatible Time-Sharing System (CTSS) Developed at MIT as project MACTime Slicing:When control was passed to a userUser program and data loadedClock generates interrupts about every 0.2 secAt each interrupt OS gained control and could assign processor to another userCTSS OperationRoadmapThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesOperating SystemA program that controls the execution of application programsAn interface between applications and hardwareMain objectives of an OS:ConvenienceEfficiencyAbility to evolveLayers and ViewsOS as Service Provider Program developmente.g., editors and debuggersProgram executionAccess I/O devicesControlled access to filesSystem access for shared systemsError detection and responsee.g., memory error, device failure, division by zeroAccounting for resources and performance monitoringOS as Resource ManagerA computer is a set of resources for the movement, storage, and processing of data.The OS is responsible for managing these resources.OS as Resource ManagerRoadmapThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesInstruction ExecutionA program consists of a set of instructions stored in memoryTwo stepsProcessor reads (fetches) instructions from memoryProcessor executes each instructionExample of Program ExecutionRoadmapThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesInterruptsInterrupt the normal sequencing of the processorProvided to improve processor utilizationMost I/O devices are slower than the processorProcessor must pause to wait for deviceFlow of Control without InterruptsInterrupts and the Instruction CycleTransfer of Control via InterruptsInstruction Cycle with InterruptsI/O WaitSimple Interrupt ProcessingChanges in Memory and Registers for an InterruptMultiprogrammingProcessor has more than one program to executeThe sequence the programs are executed depend on their relative priority and whether they are waiting for I/OAfter an interrupt handler completes, control may not return to the program that was executing at the time of the interruptRoadmapThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesMemory HierarchyMajor constraints in memoryAmountSpeedExpenseFaster access time, greater cost per bitGreater capacity, smaller cost per bitGreater capacity, slower access speedThe Memory HierarchyGoing down the hierarchyDecreasing cost per bitIncreasing capacityIncreasing access timeDecreasing frequency of access to the memory by the processorSecondary MemoryAuxiliary memoryExternalNonvolatileUsed to store program and data filesRoadmapThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesCache MemoryProcessor must access memory at least once per instruction cycleProcessor speed faster than memory access speedExploit the principle of locality with a small fast memoryData which is required soon is often close to the current data. If data is referenced, then it’s neighbour might be needed soon.Cache PrinciplesContains copy of a portion of main memoryProcessor first checks cacheIf not found, block of memory read into cacheBecause of locality of reference, likely future memory references are in that blockCache/Main-Memory StructureCache Read OperationCache Design IssuesMain categories are:Cache sizeBlock sizeMapping functionReplacement algorithmWrite policySize issuesCache sizeSmall caches have significant impact on performanceBlock sizeThe unit of data exchanged between cache and main memoryLarger block size means more hits But too large reduces chance of reuse.Mapping functionDetermines which cache location the block will occupyTwo constraints:When one block read in, another may need replacedComplexity of mapping function increases circuitry costs for searching.Replacement AlgorithmChooses which block to replace when a new block is to be loaded into the cache.Ideally replacing a block that isn’t likely to be needed againImpossible to guaranteeEffective strategy is to replace a block that has been used less than othersLeast Recently Used (LRU)Write policyDictates when the memory write operation takes placeCan occur every time the block is updatedCan occur when the block is replacedMinimize write operationsLeave main memory in an obsolete stateRoadmapThe Evolution of Operating SystemsOS Objectives and FunctionsInstruction ExecutionInterruptsThe Memory HierarchyCache MemoryI/O Communication TechniquesI/O TechniquesWhen the processor encounters an instruction relating to I/O, it executes that instruction by issuing a command to the appropriate I/O module.Three techniques are possible for I/O operations:Programmed I/OInterrupt-driven I/ODirect memory access (DMA)Programmed I/OThe I/O module performs the requested action then sets the appropriate bits in the I/O status register but takes no further action to alert the processor.As there are no interrupts, the processor must determine when the instruction is completeProgrammed I/O ExampleData read in a word at a timeProcessor remains in status-checking loop while readingInterrupt-Driven I/OProcessor issues an I/O command to a module and then goes on to do some other useful work.The I/O module will then interrupt the processor to request service when it is ready to exchange data with the processor.Interrupt-Driven I/OEliminates needless waitingBut everything passes through processor.Direct Memory AccessPerformed by a separate module on the systemWhen needing to read/write, processor issues a command to DMA module with:Whether a read or write is requested The address of the I/O device involvedThe starting location in memory to read/writeThe number of words to be read/writtenDirect Memory AccessI/O operation delegated to DMA moduleProcessor only involved when beginning and ending transfer.Much more efficient.
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